1. Field of Technology
The present invention relates to a noise shaping over-sampling type of digital-to-analog converter whereby a digital signal having a relatively long word length is sampled at high speed to be converted to a digital signal having a relatively short word length, which is then converted to an analog signal.
2. Prior Art Technology
In recent years, with advances in digital signal processing technology, signals which were previously generally processed in analog form have come to be processed in digital form. Accompanying this trend, a demand has arisen for improved performance of digital-to-analog converters (hereinafter referred to as D/A converters), together with reduced manufacturing costs for applications such as compact disc (CD) audio reproduction systems. Specifically, D/A converter circuits are required which will provide a high S/N (signal-to-noise) ratio, reduced distortion of the output analog signal when a low amplitude signal is being reproduced, and which will be suitable for implementation within an integrated circuit (IC). Until very recently, almost every type of D/A converter was based upon generating respective current values from the bits of an input digital signal (e.g. by using a resistive ladder network) and summing these currents to obtain successive analog values from respective words of the digital signal. However such a method has certain inherent problems. Firstly, in order to maintain a high degree of conversion accuracy, i.e. to achieve linearity of conversion, a very high accuracy is required for the components (e.g. resistors) used in the conversion process. This requirement for components having very accurately predetermined values causes the manufacturing cost to be high. In addition, it is difficult to economically configure such components in an integrated circuit. Secondly, it is an inherent feature of such a D/A converter that the level of harmonic distortion of the output analog signal is substantial, when a low amplitude signal is being reproduced.
The minimum sampling frequency for representing an analog signal having a bandwidth f.sub.a is twice that bandwidth. Sampling frequency will be designated in the following as f.sub.s, i.e. in this case f.sub.s =2.f.sub.a. The level of quantization noise which is present in the output signal from a conventional D/A converter extends uniformly throughout the frequency range 0 to f.sub.s /2. In order to effectively reduce the level of quantization noise in the analog output signal from a D/A converter, it is possible to use a sampling frequency value which is much higher than the minimum value described above. In this way, the quantization noise becomes spread over a wider frequency range, with a lower noise level within the bandwidth of interest. Since the noise at frequencies higher than the bandwidth of interest can be removed by a low pass filter, this method, known as "over-sampling" can provide a substantial improvement in S/N ratio.
Furthermore, in order to reduce the level of distortion at low amplitudes of reproduced signal, and to enable a high degree of digital/analog conversion linearity to be attained without requiring very high degrees of component accuracy, the number of bits of the digital signal which is converted should be kept small. For this reason, with a D/A converter utilizing such an over-sampling method, an input digital signal having a relatively long word length (e.g. 16 bits) is quantized to be converted to a digital signal having a shorter word length. This "bit compression" results in a digital signal having a high resolution (i.e. which is capable of representing one of a large number of analog signal levels) being converted to a digital signal having much lower resolution. Quantization of a digital signal in this way is performed utilizing a circuit section referred to as a local quantizer.
In order to further reduce the noise level of the output analog signal from a D/A converter system employing the over-sampling and quantization techniques described above, a technique called "noise-shaping quantization" has been developed. With this method, basically, an over-sampling digital input signal produced by A/D conversion is applied through an adder to a local quantizer. The quantization error of the local quantizer is obtained by subtracting the input and output signals of the local quantizer, the result is delayed by an amount equal to one sampling period of the input signal, and the delayed error signal is subtracted from the input digital signal in the adder. In this way, during each sampling period of the input signal, the quantization error of the previous sampling period is subtracted from that signal, and the result is supplied to the local quantizer. This has the effect of reducing the quantization noise level in the output signal at low frequencies, and increasing the noise level at high frequencies, i.e. "shaping" the noise frequency spectrum, so that the noise level within the frequency band to be reproduced is lowered.
A further development of this technique is described in Japanese Patent Laid-open No. 61-177819. FIG. 1 is a block diagram of an over-sampling type of D/A converter described in that patent document. In FIG. 1, a sigma delta modulation circuit 100 is configured as an integrator 118, a local quantizer 114, delay elements 115, 117 and 119, and adders 113 and 120. In addition, a second sigma delta modulation circuit 200 is configured from an adder 121, an integrator 122, a local quantizer 123, a delay element 124 and a differentiator 125. When the value of the input data supplied as input to local quantizer 114 or 123 is greater than or equal to zero, the local quantizer produces an output digital signal of fixed value, designated as quantization level 1, while when the input data is less than zero, a negative output of equal magnitude, designated as quantization level -1, is produced. The output from the adder 120, which is the difference between the input and output signals of the local quantizer 114, represents the quantization error of the local quantizer 114. The outputs from the delay element 115 and the differentiator 125 are added in the adder 127, and the result is supplied to a circuit 128 which executes the actual digital-to-analog conversion processing to produce an analog signal. To avoid confusion in the following, such a circuit will be referred to as D/A conversion circuit, while an overall system as shown in FIG. 1 will be referred to as a D/A converter. In this example, the possible output values from the delay element 115 are +1. In addition, the possible input values to the differentiator 125 are +1, so that the output values from the differentiator 125 are -2, 0, +2. Thus, the output from the adder 127 can take four values, i.e. -3, -1, +1 and +3.
FIG. 2 shows the output level and noise frequency spectrum distribution characteristic of the D/A converter of FIG. 1, for the case of a sine wave input signal being applied. As shown, a maximum S/N ratio of 90 dB is obtained when a sampling frequency is used which is 256 times the bandwidth to be reproduced.
With such a prior art configuration, designating the peak input signal level variation as +3, the corresponding maximum effective output level variation is +1, which is excessively small. This is due to the fact that the output from the first local quantizer will only vary between +1. Thus for example if a 2 bit D/A converter circuit is utilized for the D/A conversion circuit 128, with a supply voltage of 5 V (so that the analog output signal values corresponding to respective digital samples will be in the range 0 to 5 V), then when the input digital signal represents a 0 dB level sine wave signal (i.e. a maximum input level value) the resultant output signal from the D/A conversion circuit 128 will only attain 589 mV (rms). This very low level of output signal in response to a maximum value input signal is undesirable both from the aspect of attaining a sufficiently high S/N ratio and the aspect of effectiveness of supply voltage utilization. Furthermore the output values are +3 and +1, and do not include 0. Thus if the input signal to the D/A converter circuit is set in a "hold" status, representing a zero input signal level, a DC offset will invariable be produced in the output from the D/A converter circuit 128. This is a practical disadvantage in a practical system, e.g. in an audio reproduction system.
In addition to the above, there is also a need to achieve a higher level of S/N ratio for such a noise shaping D/A converter than is possible with the prior art example described above.